This invention relates in general to a technique for efficiently employing the hardware and software in a data processing system. More particularly, this invention is directed to providing multiple data stream pointers to a CPU by employing a custom chip having a single register.
Data processing systems are known, including the self-contained hand-held variety, in which a central processing unit (CPU) responds to keyboard inputs, reads from a read only memory (ROM), and interfaces with a random access memory (RAM).
When operating upon data stored in sequentially arranged memory locations (data streams), the use of a memory location for storing the address of the data position currently being accessed has proven effective. The address contained in the memory location is often called the data stream pointer. By incrementing the data stream pointer, the next sequentially stored data may be accessed.
Incrementing the data stream pointer using the registers provided within certain CPUs, however, has been found to be inefficient because some CPUs have a limited number of internal registers. In addition, the internal CPU registers are often of a limited size. When a large address (more than eight bits) must be incremented by a CPU having small registers, the reading and incrementing must be performed on the large address, one byte at a time. Therefore, the inefficiency of incrementing a large address grows as the size of the ROM increases because the number of address bits must increase to accommodate the ROM size. As a result, external increment counters (registers) have been used to hold and increment the pointers, eliminating the need to transmit the pointers to the CPU for incrementing, and thus avoiding the limitations internal to the CPU. The CPU continues to access and operate upon the data pointed to by the pointer.
When dealing with multiple data streams, a number of registers equal to the number of data streams to be scanned has been provided. Providing multiple registers to access multiple data streams of sequentially arranged data, however, has a number of drawbacks. For example, additional hardware space is needed to accommodate the ROM addressing registers and the system cost increases due to the added registers and associated connections required.
Techniques for speeding up processing are part of a trade-off between CPU capacity, hardware costs, and response time. In order to provide compact, relatively inexpensive data processing units, and in particular, those that are self-contained, battery operated, and hand-held, it is important that the most efficient use of hardware and software be employed so that cost and size are minimized, while response time is maintained at an acceptable level.
Accordingly, the major purpose of this invention is to provide a technique for accessing multiple data streams by employing a single register to increment the pointers assigned to each of the data streams.